The present invention is related to a method for under-bump-metallisation (UBM) of single chips, dice or wafer parts. The under-bump-metallisation in one aspect is formed by electroless plating of the bonding pads.
In the field of semiconductor packaging, the classical approach, which has been used for a long time, is to wire-bond the chip to a lead frame. However, the electrical performance of wire bonded leads can be inadequate, the number of Input/Output (I/O) pads can be too large or there is simply not enough space for wire bonds to be made. As chips gain functionality and their number of Input/Output (I/O) pads increases, integrated circuit manufacturers are therefore searching for alternative ways to package these higher performance devices. Flip Chip technology allows to directly connect the bond pads of the chip with the bond pads of the substrate, board or package. To accomplish this, the chip is flipped to bond the active side, i.e. containing the bond pads of the chip, to the substrate. In flip chip bonding, solder bumps provide connections between the bonding pads of the chip and the bonding pads or metallization present on the substrate or carrier.
Before bonding the chips to the substrate, additional steps are required to modify the top layer, e.g. an aluminium alloy, of the bond pads and/or to add layers to these bond pads as such aluminium alloy top layers can not be soldered or glued. These additional steps comprise the use of e.g. electroless Nickel/immersion Gold (e-Ni/Au) plating as a bond pad-finishing step prior to the flip-chip assembly. The UBM forms an interface between the bonding pads and the solder bumps and provides adhesion, forms a diffusion barrier and offers solder wettable layers. After formation of the UBM, solder bumps can be formed on the bonding pads by various methods, such as electroplating. These additional steps, also known as Under Bump Metallurgy (UBM), form a commercially available process for bonding entire wafers. Wafer-scale UBM processes are commercially available and are offered by companies such as Pac Techxe2x80x94Packaging Technologies GmbH, Germany, or Picopak Oy, Finland.
However, it often occurs that the entire wafer is unavailable or it is not cost effective to use an entire wafer. It might be that even single chips have to be bumped, particularly in prototyping and small volume applications. In these cases, after finishing or completing the processing of the semiconductor wafer comprising integrated circuits or devices, the wafer is split into parts or singulated into dice or chips. Afterwards, selected dice or chips can be further processed to finally yield a bonded chip. This process of bonding single chips also contains the steps of forming an UBM, creating solder bumps on the bond pads and flip chip connecting the single chip to the substrate or package.
A way to plate bond pads of a single chip currently being applied is to deposit on the edges and on the backside of the chip or wafer part a photoresist layer. This technique is already used for electroless plating of entire wafers in order to form the UBM. In xe2x80x9cLow Cost Wafer Bumping Processes for Flip Chip Applications (Electroless Nickel-Gold/Stencil Printing)xe2x80x9d by A. Strandjord et al, IMAPS ""99, Chicago a method for plating wafer using resist to protect the backside of the wafer is disclosed. The backside of the wafer is covered with a resist layer to avoid plating on this region. Because the area of the backside is large compared to the total area of the bonding pads to be plated, plating the backside would consume a major part of e.g. the Nickel present in the plating solution. This excess and unwanted consumption of Nickel would substantially decrease the lifetime of the plating bath. Furthermore, Nickel grown on the back side of the silicon substrate will adhere poorly to this silicon surface and may be lifted off during subsequent processing. Therefore, one covers the back side of single chips with a resist layer. However, the application of this wafer-scale technique to the formation of UBM on single dice is a manual, time consuming and expensive processing step.
Recently, another method for single chip plating was described by J. Jittinorasett et al in xe2x80x9cUBM formation on single Die/Dice for Flip-Chip applicationsxe2x80x9d, Proceedings of the 32nd International Symposium on Microelectronics, Chicago, Oct. 26-28, 1999, pp. 39-44. The authors emphasise the importance of proper handling of the chips. The authors apply a quite complicated and critical procedure to deposit the UBM, comprising multiple etching and deposition steps in order to solve the non-homogeneous character and the roughness of the electroless deposited Nickel layer. The authors also apply a complicated way of material handling, comprising the steps of bonding the dies onto a temporary substrate by means of an amorphous thermoplastic adhesive. A thermoplastic adhesive is an adhesive which becomes softer as temperature increases regardless how many times they are exposed to heat. This bonding step includes the step of executing a thermocompression cycle and requires high temperatures and a holding force to obtain a bond that withstands the plating process. The release of the plated chip further requires additional heating steps. Finally, time-consuming cleaning steps were required to remove after debonding all residues of the amorphous thermoplastic adhesive on the backside. So, no successful attempts to plate single chips or wafer parts in a low cost way were reported.
An aim of the invention is to offer a method for forming under-bump-metallurgy on all bonding pads of a single chip, die or wafer part. These bonding pads include the bonding pads connected with the ground plane or small bond pads.
An additional aim of the present invention is to offer a method to uniform plate bonding pads on singulated chips, single dice or wafer parts in a much more simple and cost-effective way.
Another aim of the present invention is to offer a method to apply commercially available electroless plating procedures to uniformally plate bonding pads on singulated chips, single dice or wafer parts in a much more simple and cost-effective way.
Yet another aim of the present invention is to simplify and to ease the handling of the singulated chips, single dice or wafer parts during the formation of the UBM. Preferably the formation of the UBM is done by electroless plating.
Still another aim of the present invention is to offer a simple and cost-effective method to substantial uniformly plate bonding pads of a single chip and to avoid plating on a major part of this single chip.
In a first aspect of the invention, a method to uniformly plate all dimensions of bond pads in case of singulated chips, single dice or wafer parts, is presented. The method comprises the steps of providing a carrier and an adhesive, attaching the individual chip to a carrier (the step of attaching consisting of contacting the adhesive with at least a portion of the individual chip) and electroless plating the bond pads of said individual chip. In this manner, the attaching of the carrier need not be performed by applying heat, etc. In one embodiment, at least a portion of the wafer is attached via a non-conductive substrate or glue layer. Moreover, in one embodiment of the invention, this glue layer is a pressure-sensitive adhesive. This pressure-sensitive adhesive has a cure or melt temperature above the process temperature of the plating bath. This cure or melt temperature is preferably higher than 100xc2x0 C. In a preferred embodiment, Nitto(trademark) tape is used to attach the single die to the temporary carrier.
In another embodiment of the invention, the plating bath used is an electroless plating bath. This electroless plating bath is a self-catalytic plating bath. In a preferred embodiment a Nickel plating bath is used to form the UBM.
In another embodiment the non-conductive substrate has a cure or melt temperature above the process temperature of the plating bath. Preferably this cure or melt temperature is higher than 100xc2x0 C. In a preferred embodiment a polyamide carrier is used as non-conductive substrate.
In another aspect of the invention, a method for electroless plating at least two chips is disclosed. The method comprising the steps of attaching the chips to a carrier, electroless plating the bond pads of the chips, and dicing to separate the chips. The method allows for the use of the same carrier for both the steps of electroless plating the bond pads and dicing. In one embodiment, the electroless plating is performed prior to the dicing. In an alternate embodiment, the dicing is performed prior to the elecroless plating. Moreover, in one embodiment, the at least two chips comprise a wafer, the step of attaching includes attaching the carrier to the wafer, and the step of dicing includes dicing the wafer. Further, the step of attaching in this aspect of the invention consists of contacting the adhesive with at least a portion of the individual chip. The method may further comprise the step of detaching the individual chip from the carrier. The method may further comprise the step of forming an insulating layer at least to a bottom surface of the wafer, this step of forming an insulating layer at least to the bottom surface of the wafer comprising the step of gluing the wafer to a non-conductive carrier using a pressure-sensitive adhesive.